Join our team to drive the optimization of network infrastructure and trading system components through high-speed hardware designs. As part of a dynamic group consisting of traders, software developers, and infrastructure engineers, you'll explore novel low-latency techniques and platforms, identifying opportunities for seamless integration into our trading system.
Key Responsibilities:
Collaborate within a multidisciplinary team to accelerate network infrastructure and trading system components using high-speed hardware designs.
Research and evaluate new low-latency techniques and platforms for potential integration into our trading system.
Utilize cutting-edge server hardware by leveraging existing hardware solutions or developing in-house versions to ensure compatibility with our FPGAs.
Cultivate and manage relationships with third-party vendors to enhance hardware capabilities.
Qualifications:
Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related technical field.
Hands-on experience in designing, coding, testing, and verifying FPGAs and/or ASICs.
Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages.
Familiarity with RTL synthesis, and proficient in writing timing, area, and other relevant constraints.
Experience working with digital simulators and self-checking test benches.
Prior exposure to supporting post-silicon bring-up and debugging is advantageous.
Ability to collaborate closely with software developers to ensure the rapid delivery of integrated systems.