Job Description:
Need Senior/ Lead Design Verification Engineers for AI acceleration.
Skills: Pcie,HBM, Ethernet, Emulation verification
Min 7+ direct experience in any of -
- Ethernet mac/pcs VIP integration tests + preferrably network on chip testing.
- Pcie subsystem VIP integration tests + preferrably embedded risc-v type uP integration tests.
- HBM subsystem tests.
Emulation infrastructure setup (palladium/protium or zebu).