Design Verification Engineer
at LanceSoft Inc
in
San Diego,
California
Posted in Other 3 days ago.
Type: full-time
Job Description:
1. 8 to 12 years of ASIC design, verification or related work experience
2. Strong troubleshooting skills across embedded systems disciplines (PMIC , Analog behavioral models , digital RTL, Firmware)
3. Expert-level System Verilog Programming
4. Advanced UVM/SV(Universal Verification Methodology using System Verilog)
5. Experience with Python or Perl Scripting