Location: Austin but will consider San Jose people
Job Description:
Use industry standard tools to implement scan in complex IP, and generate high coverage ATPG patterns utilizing scan compression and verification.
Analyze scan coverage, and implementation issues and develop strategies to address quality and efficiency.
Build a verification environment to run and debug gate-level simulations.
Document scan designs and maintain guidelines for best scan design practices.
Define, develop, and improve scan design process flows and methodologies for continuous improvement.
Run, debug, and perform diagnostics on scan patterns post-silicon on a production and debug tester
MBIST
Job Responsibilities:
Hands-on responsibility from MBIST insertion to verifications.
Running MBIST simulations, including gate-level with timing corners and debugging.
Assist MBIST/DFT leads and Interact with RTL counterparts to resolve design issues.
DFT Job Requirements:
Strong problem solving skills.
Have 2+ years of experience with Synopsys ATPG TetraMAX or Mentor Fastscan.
Knowledge of low-power design methodologies.
Must have scripting and automation skills - Preferred Python and Perl, TCL.
Experience with synthesis, static timing analysis, and ATPG modeling.
Knowledge of stuck-at, transition, IDDQ, and other advanced fault models.
Self-motivated, able to work independently, excellent communication skills, excellent presentation skills for design reviews, and ability to excel in a cross-functional team environment.
MSEE or BSEE with 5+ years relevant experience preferred (or equivalent education and experience)
MBIST Job Requirements:
Strong working knowledge of VCS RTL/GLS simulations and debugging.
Experience in Tessent MBIST flows and tools.
Strong scripting/programming skills in Tcl, Perl, Shell, and/or Python are preferred.