Extraction Flow Architect #6971 Bay Area, Taiwan, China
Job Description and Requirements
My client is an international leader in EDA tools with a long history of successful EDA tools covering major parts of the flow. This position is for a high-performing R&D engineer to lead their R&D team developing the market-leading interconnect parasitic extraction tool.
Their parasitic extraction product compliments other leading edge tools and flows they have developed, as well as flows for all major EDA companies. As a key component of their Design Platform, it provides a silicon accurate and high-performance extraction solution for SoC, custom digital, analog/mixed-signal and memory IC designs and offers modeling of physical effects for advanced process technologies, including FinFET technologies.
Its seamless integration with industry standard digital and custom implementation systems, timing, signal integrity, power, physical verification and circuit simulation flows delivers unmatched ease-of-use and productivity to speed design closure and signoff verification.
Responsibilities
Research, design, and development of innovative solutions to complex problems leading to highly differentiated and high-quality production software.
Designing technical and product requirements specifications.
Designing interfaces with third-party tools to build different flows which include parasitic extraction.
Closely work with PE and PV teams to define product requirements, roadmap and product validation strategies.
Participate in product documentation process.
Designing very efficient data structures and algorithms.
Runtime and memory requirements optimization.
Designing, developing, debugging and maintaining complex software written in C/C++, taking ownership of specific customers and tool integration issues, communicating status within R&D and to management.
Requirements
MS/PhD in Mathematics/Physics, Computer Science or Electrical Engineering. Doctorate or equivalent industrial experience preferred.
Deep understanding of parasitic RC extraction techniques is a must, 5+ years EDA experience in parasitic RC extraction or adjacent EDA area.
Extensive experience in software engineering, complex C/C++ software development, data structures/algorithms and parallel computing architecture.
Good written and spoken English
Preferred Experience
Understanding of post-layout simulation flows, i.e. EMIR, STA etc
Same or similar position in one of EDA companies.
Experience with adjacent EDA areas/tools (LVS, post-layout simulation, etc).
Please contact Mark Gilbert at EDA-Careers...mark@eda-careers.com or 305-598-2222x3