Compiler Engineer at Efficient Computer in Santa Rosa, California

Posted in Other 1 day ago.

Type: full-time





Job Description:

The Compiler Engineer will contribute to the design and implementation of different components of our MLIR-based compiler stack. Additionally, they will help integrate new front ends to the compiler, including those targeting embedded digital signal processing and TinyML applications.

This position is a unique opportunity to enable the development of applications for cutting-edge hardware as part of a highly interdisciplinary team.

If you are an engineer who wants to be part of an intensely skilled team and wants to have an immediate impact building the next generation of energy-efficient applications, we want to talk with you!

Key Responsibilities
  • Develop new compiler features to improve overall energy efficiency while maintaining programmability. These may relate to:
  • Efficient's new dataflow ISA
  • Source-level debugging tools
  • Dataflow graph optimizations
  • Hardware constraints such as timing and power consumption
  • Place-and-route of applications onto Efficient's fabric
  • Visualization
  • Write unit and integration tests to uncover functional- and performance-related compiler bugs.
  • Work with various software frameworks (e.g. Tensorflow, CMSIS-DSP, etc.) to provide a high quality API for our custom hardware.
  • Debug and fix functional and performance issues of the compiler system.
  • Collaborate with the hardware and physical design team to understand and improve the chip architecture and propose future improvements.
  • Work closely with the embedded team to understand the problem domain and deliver optimized compiler solutions.

Required Qualifications & Experience Requirements
  • 4+ years of experience with C++.
  • 2+ years of post-graduate compiler work experience.
  • Experience with compiler frameworks such as LLVM, MLIR, or similar.
  • Bachelor's required, Master's degree preferred in CS or related field.
  • Understanding of computer architecture and optimization.
  • Experience using industry standard development and debugging tools including GDB.
  • Strong attention to detail, good work ethic, ability to work on multiple projects simultaneously, and good communication skills.
  • Good problem solving skills.

Desired Qualifications & Experience Requirements
  • Familiarity with FPGA-compilation and/or PnR algorithms.
  • Experience with debug symbol tables such as DWARF
  • Experience with Verilog, system Verilog, or VHDL.
  • Knowledge of computer architecture.

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