Job Description:
Must-Have Skills
- Strong System Verilog, debugging skills, experience owning areas of product verification
- 5-10 years of experience working as a verification engineer
- Proficient with UVM and integration verification
Nice-to-have Skills
- Experience with Python
- Experience with C/C++
Degrees/Certifications Required: Bachelor's degree in electrical engineering, Computer Science, or equivalent experience
Job Responsibilities:
- Define electrical verification methodologies for each of the different systems by working with researchers, architects, and design teams
- Define and track detailed test plans for the different modules and top-level systems
- Define, architect, design, and drive implementation of scalable test infrastructure
- Keep track of coverage metrics and bugs encountered and fixed
- Own execution, interpretation, and reporting of electrical system-level verification work status and results
- Support system bring-up and debug activities
- communicate test plans and results