We are partnered with one of the hottest RISC-V start-up in the US. They are looking to bring on board a talented Design Verification Engineer for their elite team to accelerate growth this year! Recent hires include talent from Google, Intel, and NVIDIA as they work to reduce the cost of AI models with a chip that delivers comparable power.
With a vision to reimagine accelerated computing, they have gained widespread recognition for their mission to make AI workload processing more accessible, efficient, cost-effective, and environmentally friendly. Backed by a top-tier management team, including former Silicon Valley engineers, they are scaling rapidly.
We are looking for an engineer eager to make a significant impact in one of the world's leading emerging compiler teams. This is a hybrid position available In Mountain View CA , Austin TX, Portland OR, Fort Collins CO.
Key Responsibilities:
-Responsible for all aspects of Silicon/SoC digital verification.
-Develop test plans and test benches.
-Perform debugging, regression analysis, and coverage closure while supporting emulation and silicon bring-up teams.
Key Requirements
-3+ years of experience in verifying memory controller or memory subsystem design.
-Skills in digital verification, including functional, performance, and memory subsystem design.
-Familiarity with digital verification for pre-silicon chip design.
-Ability to work with cross-functional teams.
This is not an graduate level role - Salaries are high and stock options offered!
If you want to accelerate your career in a high performing team, then apply the link with you updated resume immediately!