FPGA/ASIC Verification Engineer at The Judge Group Inc. in Goleta, California

Posted in Other about 6 hours ago.





Job Description:

Location: Goleta, CA

Salary: $100.00 USD Hourly - $110.00 USD Hourly

Description:





  • Title: FPGA/ASIC Verification Engineer


  • Location: Hybrid, Goleta, CA


  • Duration: 06+ months Contract


Job details:





  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related

  • field, or equivalent practical experience.

  • 8 years of experience with verification methodologies and languages such as UVM and

  • SystemVerilog.

  • Experience developing and maintaining verification test benches, test cases, and test

  • environments.

  • Experience in all aspects of the verification life cycle, specifically, SDF and GLS simulations

  • Experience in Ethernet and SPI required





Contact: bkumar@judge.com


This job and many more are available through The Judge Group. Find us on the web at www.judge.com
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